Cut and paste this URL to share the unmodified register and value:
https://regviz.com/r/Silicon Labs/Series1/EFR32FG12P/EFR32FG12P431F1024GM68/MSC/RAMCTRL#0x0
RAM Control Enable Register
RAM CACHE Enable
RAM1 CACHE Enable
https://github.com/cmsis-svd/cmsis-svd-data